This invention relates to a synchronization circuit for use in controlling synchronization on demodulation of an input signal.
In Japanese Unexamined Patent Publication No. Syo 59-141,847, namely, No. 141,847/1984, a synchronization circuit of the type described herein is revealed by Junji Namiki, assignor to NEC Corporation, and is operable in response to an input signal carrying a sequence of transmission data signals at a symbol rate or baud rate which will herein be called "a transmission rate". The synchronization circuit establishes synchronism by directly controlling sampling time instants.
More specifically, the input signal is supplied to first and second samplers which are operable in response to a first sampling signal of a predetermined phase and to a second sampling signal of a .pi. phase relative to the first sampling signal, respectively. Anyway, first and second sampled signals are produced from the first and second samplers, respectively, and processed into phase difference signals representative of phase differences between the transmission data signals and the sampling time instants. The phase difference signals are sent to a timing controller for controlling the first and second sampling signals. Eventually, the first and second sampling signals are phase matched with the transmission data signals. Thus, each of the first and second sampling signals is varied in frequency and phase by the timing controller in accordance with the phase difference signals.
However, the synchronization circuit revealed by Namiki can not be used when a sampling rate is invariable and is different from the transmission rate of the transmission data signals. A great deal of calculations would have to be carried out at a high speed to accomplish the desired operation in response to an invariable sampling rate.